The Ever-Changing Design Team
By David Lammers & Ed Sperling
Disaggregation and maturation of an industry are supposed to lead to specialization. It happened in automobiles, fields as diverse as defense, and increasingly it’s happening in the design of everything from SoCs to entire end-user systems.
What’s different about semiconductor design, however, is that no sooner are tools created to effectively handle complex tasks than new ones crop up. At 0.25 microns, just laying out a chip and getting all the transistors to work together was a problem. At 28nm, getting a chip verified and solving the power issues are getting the lion’s share of the attention, along with increasing array of software testing and verification.
Move up a level to the overall system, where many of these issues are no longer being addressed, and the world is looking remarkably less complicated than in the past. Smaller teams, led by domain experts, are accomplishing things much faster and for much lower cost.
“Domain experts can lead much smaller teams, building systems, and that is exactly what we see happening,” said James Truchard, CEO of National Instruments, in a keynote speech at NIWeek 2010. He said design teams for those types of devices no longer need to be staffed by large groups of hardware and software engineers.
That trend is echoed by biomedical researchers at Silicon Biosystems (Bologna, Italy), who are building cell-sorting equipment. Giuseppe Giorgini, CEO of Silicon Biosystems, said his relatively small team was able to quickly develop a dielectrophoresis (DEP) cage to detect tumor cells in a cancer patient’s bloodstream, shaving six months from the expected development time. Likewise, Windlift (Durham, N.C.), slashed the size of its own development team of wind power engineers, who are creating a battlefield power-generation system that uses kites to generate enough power for soldiers in remote locations in Afghanistan
“We are finding customers doing the odd jobs,” NI’s Truchard said, “the mom and pop shops developing robots, biomedical systems, and other products where domain expertise is the main thing.”
Complexity under the covers
While it may look simpler at the overall system level, the reality is that things are actually getting more complex. At the SoC level, where many of these issues are now being addressed, design teams are actually growing. Moreover, these teams are doing more jobs that previously were handled by other companies—creating drivers, interfaces, defining interconnects, and building in the I/O IP. They also are building an increasing amount of firmware, and sometimes even executable code, to add new functions into these systems. And then they’re verifying everything works within a specific power budget.
“There are several trends at work here,” said Qi Wang, senior architect at Cadence Design Systems. “Designs are more complicated and there are more blocks to be implemented. As a result, design teams are growing in terms of the number of employees and by region.”
The rule of thumb in IP re-use is that for every $1 spent on IP it costs $2 to use it. “As more people try to re-use IP, they have to spend time to make sure they’re using the right IP and that they’re using it correctly. You need to use IP in a way that it’s supposed to be used. It all has to be verified, too. Verification is growing exponentially. If you double the complexity of the chip you quadruple the complexity of the verification.”
Cuts some places, not others
Even within the semiconductor design teams there are shifts. Physical layout is largely automated or subject to strict rules from the foundries, while the number of verification engineers is on the rise. They now have to verify not only hardware, but software, as well. And while hardware and software verification teams don’t necessarily see themselves working on the same team, many chip companies are now bridging both worlds with their own version of a domain expert, who wield control over ever-larger numbers of engineers. Debugging hardware and software in sync is much more difficult than debugging just the hardware or the software.
The result is a heavy reliance on automation tools to solve increasingly complex problems, ranging from multi-million dollar emulation machines on one side to smaller hand-built devices on the other that cost a fraction of the emulation hardware. There also is a heavy reliance on software prototyping, as chip companies are called upon to produce an increased amount of software code with their hardware ever more quickly.
In an effort to control costs and cut time to market, chipmakers are planning more derivative chips and building in more re-usable content and IP. Software is backward compatible, IP is forward-compatible, and hardware increasingly is more of a platform that can accommodate both. And while the task of integration and verification continue to be monumental efforts, there also is more room for test, analysis and flexible modeling around the sides. But all of this still takes highly trained engineers—even though in areas such as verification, training can actually increase productivity per engineer.
Low-power everywhere
One result of this new way of looking at design, however, is the need to address power in everything. Aside from the need to conserve battery life in consumer devices, which is always a consideration, the focus on integration of existing components means there is less margin in the power budget because some of the older software, hardware and IP use more power than newer versions. If the power budget is fixed, that means everything else that is being created from scratch has to use less power.
“There are shifts under way in the design teams,” said Cary Chin, director of technical marketing for low-power solutions at Synopsys. “Power and verification are happening over time rather than at a single point in time, but implementation is now heavily focused on re-use. It isn’t practical to design 300 million transistors. That re-use is painful if it’s not modeled correctly, but a lot of it can be automated.”
Chin said the number of projects has gone down, but the size of design teams has not—particularly for big processors. “They’re just doing different things. They used to do RT/l and synthesis. Now they’re working on software and verification and power.”
Even within FPGAs, teams are beginning to grow. Complexity has added the same kind of issues to many FPGAs—power, integration and verification. This mentality is beginning to filter up into the equipment used to test and debug the chips, as well.
Tags: Cadence, National Instruments, SIlicon Biosystems, Synopsys, Windlift